Compute Express Link is a cache-coherent link meant to help systems, especially those with accelerators, operate more efficiently.
CXL uses 3 main protocol.
1. CXL.io – used for initialization, link-up, device discovery and enumeration, and register access.
2. CXL.cache – defines interactions between a Host (usually a CPU) and Device (such as a CXL memory module or accelerator.
3. CXL.memory – protocol that provides a Host processor (usually a CPU) with direct access to Device-attached memory using load/ store commands.
Typical use case
Type 1 one can think of as an accelerator like a NIC that accesses the host CPU’s memory directly. Type 2 is a case where we have an accelerator, like a GPU with memory, and the GPU can access host memory while the host CPU can access GPU memory. Type 3 one can think of as a memory module where its primary purpose is to expose the CXL memory device’s media to the host CPU. Nice detailed article and video can be found in the below source.
Source: Compute Express Link or CXL What it is and Examples – ServeTheHome
To match an ever-growing need for data storage space, Inventec (2356.TW), one of the key suppliers of world’s leading server brands, hyperscale data centers and server system integrators, announced the arrival of Entei – a 2U24Bay Storage Server System to support dual 2nd Gen Intel Xeon Scalable processors.
Source: Inventec Introduces Entei, the Advanced Storage Server System
Servers come in several different configurations. In the data center, decisions about blade server vs. rack server vs. tower server will affect performance, data center space, budgets, and scalability. This article is a quick start guide to rack servers, blade servers, tower servers: how to understand their advantages and shortcomings, and how each type fits into your server requirements.
Source: Blade vs. Rack vs. Tower Servers
Huawei Technologies, the world’s biggest telecom equipment maker, launched a new core processor chipset on Monday for use in data center servers, a move to provide an alternative for the market to Intel’s products.
Source: Huawei launches new chipset as Intel alternative – Nikkei Asian Review
16 and 32-core SKUs
3.0GHz base clock, 3.3GHz Turbo
256KB L2 per pair of cores.
32MB global shared L3 cache
8x DDR4-2667 memory channels (170.7GB/s memory bandwidth)
16 DIMMs, up to 1TB DRAM per socket (most Intel Xeons top out at 768GB)
42 lanes of PCIe 3.0 connectivity
Source: Ampere eMag 64-bit ARM Server Platform Targets Intel Data Centers – ExtremeTech